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Information × Registration Number 0201U008151, 0100U000953 , R & D reports Title Methods and Tools for Mapping Regular Algorithms into Configured Computational Raw. popup.stage_title Head Simonenko Valerij Pavlovych, Registration Date 20-12-2001 Organization The informatics and computer science faculty the National Technical University of Ukraine "KPI" popup.description2 The scientific field is mapping of regular algorithms into the programmable computational raw, like the field programmable gate array (FPGA). The goal of the work is the development of methods and tools for the computer aided design (CAD) of FPGA applications. In the report the state of solving the algorithm mapping problem for the data paths is considered. The method of mapping the periodical algorithms into FPGAs is developed. This method is proved in the example of the parallel system development for the Givens QR decomposition. The method for CAD development of data paths using the designed Parlab program tool is proposed. The library of the intellectual property cores for FPGAs is developed, which includes digital filter core generators, parametrizable fast Fourier transform core, discrete cosine transform cores. The core characteristics are high comparing to the known analogous cores. The method for mapping the microcontroller architecture into the application specific processor is developed. T he CAD tool is proposed which based on this method, and which maps the i8051 assembly code into Xilinx Virtex FPGA with extremally small hardware volume and 20 -fold accelerating of the performance comparing to the standard i8051 microcontroller. Product Description popup.authors popup.nrat_date 2020-04-02 Close