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Information × Registration Number 0211U004316, 0110U006850 , R & D reports Title Custom digital VLSI circuit place minimization popup.stage_title Head Bazylevych Roman, Registration Date 02-02-2011 Organization Lviv Polytechnic National University popup.description2 Developed mathematical methods and algorithms for custom digital VLSI area minimization. The basic idea of project consists in the decomposition of complex circuit to partitions by the method of the optimum circuit reduction, forming of loosely coupled macroelements and their following hierarchical placement by the high-quality algorithms of global and local optimization. Practical importance of project consists in development of competitive methods and algorithms for quality design of widely used custom VLSI. Product Description popup.authors Базилевич Л.В. Базилевич Р.П. Влах М.І. Николишин М.М. Пелех Н.А. Ткаченко Н. М. Щерб"юк І.Ф. popup.nrat_date 2020-04-02 Close