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Information × Registration Number 0212U004797, 0111U001114 , R & D reports Title The methods, devices and electronic components of high-performance, fault-tolerant analog-to-digital conversion popup.stage_title Head Alexey Azarov, Registration Date 26-01-2012 Organization Vinnitsa National Technical University popup.description2 The object of study - the process of performing successive approximation analog to digital converting with weight redundancy. Purpose - to develop the elements of the theory of building devices and components for the implementation of accelerated high-precision analog-digital conversion. A review of modern methods of construction a high-speed converters is done, which in turn are divided into structural and technological, algorithmic, methods to improve the performance of successive approximation ADC based on the introduction of weight redundancy, as well as methods to improve the performance of the ADC bit-encoding with the introduction of variable length cycles equilibration. Modern element base of microelectronics for the implementation of push-pull symmetric current amplifiers with symmetric structure on the basis of which it is possible to construct the analog ADC units were considered. The approaches of microelectronic design of capacitors for ADC with charge redistribution were analyzed. Mathematical models of the successive approximation ADC with variable length bars and balance model comparison operation of analog signals with adjustable sensitivity with accelerated balance were developed. The research resulted in proposed new structural solutions of ADC, which include a comparator with variable sensitivity. This will significantly reduce the conversion time. Proposed methods significantly increase the performance of the ADC due to automatic compensation of dynamic errors in the ADC with weight redundancy, proposed a method for selecting the optimal number system in terms of minimizing the time of analog-digital conversion. Identified ways to improve the reliability of parametric ADC with weight redundancy. The structural implementation and operation algorithms of ADC with weight redundancy were proposed. Original methods of designing analog nodes based on symmetric structures of two-stroke current amplifiers. Research results can significantly reduce costs and increase reliability and performance of devices as direct analog to digital conversion and entire systems without additional investment. Product Description popup.authors Азаров Олексій Дмитрович Богомолов Сергій Віталійович Бойко Олександр Володимирович Гарнага Володимир Анатолійович Дудник Олександр Вікторович Захарченко Сергій Михайлович Тарасова Ольга Миколаївна Теплицький Михайло Юхимович popup.nrat_date 2020-04-02 Close