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Information × Registration Number 0214U005042, 0112U001213 , R & D reports Title .Development of the computer multiport memory design theory based on parallel data access principles popup.stage_title Head Melnyk Anatoliy Oleksiyovych, Registration Date 30-01-2014 Organization Lviv Polytechnic State University popup.description2 3. Principles of parallel access to data and methods of multiport memory building using data ordering accordance to their indexes are developed and investigated the same as principles of data ordering in multiport computer memory with parallel access to data . Method of multiport computer memory design with parallel access to data is proposed. Models of parallel multiport memory at hardware deskription language and technology of its implementation on FPGA are proposed. Product Description popup.authors Акимишин О.І. Ваврук Є.Я. Грицик І. В. Кицун Г.В. Мельник А.О. Мельник В.А. Мороз І.В. Парамуд Я.С. popup.nrat_date 2020-04-02 Close
R & D report
.Development of the computer multiport memory design theory based on parallel data access principles
Head: Melnyk Anatoliy Oleksiyovych. .Development of the computer multiport memory design theory based on parallel data access principles. (popup.stage: ). Lviv Polytechnic State University. № 0214U005042
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Updated: 2026-03-25


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