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Information × Registration Number 0312U003518, 0112U005837 , R & D reports Title 3. Designing the problem-oriented processor for solving the problem of control for orientation of small spacecraft. popup.stage_title Розробка проблемно-орієнтованого процесора для розв'язання задач управління орієнтацією малого космічного апарату Head Palagin Alexander Vasiliyevich, Registration Date 14-12-2012 Organization V.M.Glushkov Institute of Cybernetics of NASU popup.description2 Designed problem-oriented FPGA-based processor for the implementation of algorithms of estimation and control in the format of floating point (single precision) with using CAD Xilinx ISE, and are implemented the simulation for the processor with using of ModelSim. Designed processor, because of the chip FPGA, efficient are used the reconfigurability principle, which allows easy reprogramming of the FPGA crystal sets it for the effective implementation of a given algorithm, what determines its structural flexibility. Reconfiguration of the structure is carried out by recording the configuration file into FPGA. Product Description popup.authors Лісовий Олександр Миколайович Опанасенко Володимир Миколайович popup.nrat_date 2020-04-02 Close