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Information × Registration Number 2112U000425, Article popup.category Стаття Title popup.author popup.publication 01-01-2012 popup.source_user Сумський державний університет popup.source http://essuir.sumdu.edu.ua/handle/123456789/27794 popup.publisher Сумський державний університет Description Silicon based low-roughness Au/Ti/SiO2/Si substrates were fabricated using standard IC fabrication processes. Evolution of surface roughness during substrate fabrication process was studied. Fabrication process steps, namely, thermal oxidation and e-beam evaporation for ultra-thin Ti(~ 5 nm)/Au(22 nm) films, were optimized to result in surface r.m.s roughness ~ 0.2 m and ~ 1.0 nm, after thermal oxidation and Ti/Au deposition steps respectively. Surface roughness was estimated by atomic force microscope (AFM) imaging and image analysis. Nano-patterning experiments using thiol based 16-MHA molecular-ink on fabricated substrates were carried out, under controlled environment conditions, by dip-pen-nanolithography (DPN) technique. Minimum line-width ~ 60 nm and circular dots radius ~ 175 nm were patterned. When you are citing the document, use the following link http://essuir.sumdu.edu.ua/handle/123456789/27794 popup.nrat_date 2025-03-24 Close