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Information × Registration Number 0304U001899, 0101U002363 , R & D reports Title Multichannel processors cores for symmetric flock encryption algorithms popup.stage_title Аналіз апаратних засобів шифрування та розробка архітектур багатоканальних процесорів шифрування симетричними блоковими шифрами Head Sachenko Anatolyi Alekseevich, Registration Date 06-05-2004 Organization Ternopil Academy of National Economy popup.description2 Object of research - Multichannel processor nucleus of realization symmetric блоковых algorithms of enciphering. The purpose of work is development of architecture of multichannel processors with the raised speed. Theoretical results are used at degree designing, and also at teaching separate disciplines of a special direction " Computer engineering ".Practical results - it is developed architecture of multichannel processor nucleus of algorithms of enciphering DES in such operating modes: еlectronic code book (ЕСВ), connection of blocks of code-text (СВС), feedback on an output (OFB), a feedback under the code-text (CFB). For realization of architecture it is developed nucleus a component of a list of keys and functional elements of the operational device of data processing.5635 Product Description popup.authors popup.nrat_date 2020-04-02 Close