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Information × Registration Number 2117U000801, Article popup.category Стаття Title popup.author popup.publication 01-01-2017 popup.source_user Сумський державний університет popup.source http://essuir.sumdu.edu.ua/handle/123456789/65958 popup.publisher Sumy State University Description This paper proposes the novel low power and area efficient ALU (Arithmetic and Logic Unit) using adder and multiplexers. The adder and multiplexer are realized by using CNTFET (Carbon Nano Tube Field Effect Transistor) A verilog model of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) in cadence spice software. The proposed ALU is simulated using Monte carlo simulation at 0.9 sub threshold voltage tested with 45 nm technology for the measurement of power and transistor counts. The power consumption of CNTFET based ALU is found to be 45.67 % better than the existing technologies. popup.nrat_date 2025-03-24 Close